Exemplary embodiments relate to a method of operating a semiconductor memory device and, more particularly, to a method of programming a nonvolatile memory device.
A nonvolatile memory device includes a memory cell array in which data is stored. The memory cell array includes a plurality of memory cell strings. Each of the memory cell strings includes a drain select transistor, a source select transistor, and a plurality of memory cells coupled in series between the drain select transistor and the source select transistor. The gates of the drain select transistors belonging to different cell strings are coupled to a drain select line, and the gates of the source select transistors belonging to different cell strings are coupled to a source select line. Furthermore, the gates of the memory cells belonging to different cell strings are coupled to respective word lines.
The program operation of the nonvolatile memory device is described below.
FIG. 1 is a diagram illustrating a known program method, and FIG. 2 is a diagram illustrating a shift of the threshold voltages of memory cells according to the program method of FIG. 1.
The program operation of the nonvolatile memory device is performed according to an incremental step pulse program (hereinafter referred to as an ‘ISPP’) method of supplying a gradually rising program voltage to a selected word line WL. The program operation using the ISPP method includes supplying a program voltage Vpgm to the selected word line, supplying a verification voltage Vf to the selected word line in order to verify whether the threshold voltages of programmed memory cells have reached a target level, and repeating above steps by supplying the program voltage Vpgm increasing until the threshold voltages reach the target level (22).
In the program operation using the ISPP method, a start program voltage first supplied to the selected word line is set to have a relatively low level. At the early stage (12 of FIG. 2) in which the program voltage is supplied, a difference between the target level (Vt of FIG. 2) and the threshold voltages of the memory cells is great. That is, after the start program voltage is supplied, the program voltage is raised several times, and thus the threshold voltages of the memory cells become close to the target level. Accordingly, the time T20 that it takes to perform the program operations is unnecessarily long due to the program operations performed at the early stage.
Furthermore, during the program operations, data of a specific pattern inducing an interference may be programmed into memory cells. For example, memory cells belonging to two or three neighboring strings may be programmed. Accordingly, the data stored in the memory cells may become changed by the program voltage supplied to the neighboring strings.
In order to reduce the interference, a method of programming data by random pattern is recently being used. According to a known art, a host has to allocate data to all columns even if the program operation is performed to only some of the columns. Also, if there is a column to which data has not been allocated, an error may occur.